Assembly language flow charts
Visustin generates flow charts for certain assembly languages. The supported assemblers and processor families are as follows:
- MASM/Intel x86. Microsoft Macro Assembler for Intel x86 processors.
MASM support was written for MASM v6.1 and has been verified against Microsoft Macro Assembler Reference as of Visual Studio 2015.
- NASM/Intel x86. The Netwide Assembler v2.12.02 for Intel x86 processors.
- IAR/MSP430. IAR Assembler v2.x for Texas Instruments’ MSP430 Microcontroller Family.
Intel processors are supported ranging from 8086 to Pentium, Core, Xeon and Atom. Intel x86 instructions are supported as per Intel 64 and IA-32 Architectures Software Developer's Manual dated June 2016, covering both 32- and 64-bit architectures. Besides general-purpose instructions, your source code may contain instructions from extensions such as x87 FPU, MMX, SSE, SSE2, SSE3, SSSE3, SSE4, AESNI, AVX, AVX2, AVX-512, FMA, TSX, SHA, SMX, MPX and SGX.
Other processors or assemblers than those listed above are not supported. In particular, Itanium or AMD specific instructions not listed in the above document are unsupported. If you require support for a different assembler or processor please write us.
Supported instruction types
Visustin recognizes all the instructions that are relevant to
- Unconditional jumps such as JMP.
- Conditional jumps such as JNZ.
- Looping instructions such as LOOP.
- Interrupt calls such as INT.
- Procedure calls such as CALL.
- Return instructions such as RET or IRET.
- Halt instructions such as HLT.
- Exception instructions such as UD2.
- Prefix instructions such as REP and LOCK.
All other instructions types are supported as well but have no specific visualization.
Supported syntax features
- Processor instructions
- Line labels
- Structured assembly, such as .if, .else and .while in MASM
- Conditional compilation directives (such as if or %if)
- Repetitive compilation directives (such as repeat or %rep)
- Segment definitions (.CODE, .DATA etc.)
Some data segments are not visualized, because they contain no control flow.
- Procedure calls are not resolved.
- The flow analysis is static. Run-time conditions such as register contents are not simulated. If a jump target is determined dynamically (say read from a jump table), the jump target will be unknown to Visustin.
- Actions performed by interrupts are unknown to Visustin. If a DOS program terminates by calling
int 21h, Visustin will not notice it.
- Conditional set/move instructions (
CMOVcc) are not visualized in any special way.
- Macros are not expanded, so a macro call looks like a simple statement and not the action the macro does. NASM macros
return (nagoa.inc) are supported, though.
- Instructions specific to Intel Virtual-machine extensions are not supported.
Inline asm blocks
Some higher-level languages, such as C and Delphi, support inline assembly language blocks. To flowchart the block, select the relevant Assembler mode and load the asm block into Visustin. Be sure not to flowchart any of the other language code at the same time, since Visustin flowcharts a single language at a time.
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